MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 78

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Part Number:
MK30DN512ZVLK10
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System modules
3.3.6.1 Crossbar Switch Master Assignments
The masters connected to the crossbar switch are assigned as follows:
3.3.6.2 Crossbar Switch Slave Assignments
The slaves connected to the crossbar switch are assigned as follows:
1. See
3.3.6.3 PRS register reset values
The AXBS_PRSn registers reset to 0054_3210h.
3.3.7 Memory Protection Unit (MPU) Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
78
ARM core code bus
ARM core system bus
DMA/EzPort
SDHC
Flash memory controller
SRAM backdoor
Peripheral bridge 0
Peripheral bridge 1/GPIO
Master module
Slave module
System memory map
The DMA and EzPort share a master port. Since these modules
never operate at the same time, no configuration or arbitration
explanations are necessary.
1
1
for access restrictions.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0
1
2
3
Slave port number
NOTE
0
1
2
5
Master port number
Yes
Yes
No. Protection built into bridge.
No. Protection built into bridge.
Protected by MPU?
Freescale Semiconductor, Inc.

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