MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 249

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Freescale Semiconductor, Inc.
TRACECLKSEL
CMTUARTPAD
MCGCLKSEL
PLLFLLSEL
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
23–22
21–20
15–13
Field
9–8
7–1
19
18
17
16
12
11
10
0
10
11
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value zero.
PLL/FLL clock select
Selects the MCGPLLCLK or MCGFLLCLK clock for various peripheral clocking options.
0
1
This read-only field is reserved and always has the value zero.
Debug trace clock select
Selects the core/system clock or MCG output clock (MCGOUTCLK) as the trace clock source.
0
1
CMT/UART pad drive strength
Controls the output drive strength of the CMT IRO signal or UART0_TXD signal on PTD7 pin by selecting
either one or two pads to drive it.
0
1
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value zero.
MCG clock select
Selects the MCG's external reference clock.
0
1
MCGFLLCLK clock
MCGPLLCLK clock
MCGOUTCLK
Core/system clock
Single-pad drive strength for CMT IRO or UART0_TXD.
Dual-pad drive strength for CMT IRO or UART0_TXD.
System oscillator (OSCCLK)
32 kHz RTC oscillator
OSCERCLK clock
External bypass clock (I2S0_CLKIN)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
SIM_SOPT2 field descriptions (continued)
Description
Chapter 12 System integration module (SIM)
249