MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1370

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory map/register definition
1370
CMDAUEN
CMDDUEN
RDR1EN
RDMAE
TDMAE
RXTEN
Field
RIE
TIE
22
21
20
19
18
17
16
15
0
1
Receive DMA Enable.
This bit allows I
the RFF0/1 bits in the ISR are set and if the corresponding RFEN bit is also set. If the corresponding FIFO
is disabled, a DMA request is generated when the corresponding RDR bit is set.
0
1
Receive Interrupt Enable.
This control bit allows the I
0
1
Transmit DMA Enable.
This bit allows I
the ISR[TFE0/1] bits are set and if the corresponding TCR[TFEN] bit is also set. If the corresponding FIFO
is disabled, a DMA request is generated when the corresponding TDE bit is set.
0
1
Transmit Interrupt Enable.
This control bit allows the I
0
1
Enable Bit.
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
0
1
Enable Bit.
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
0
1
Enable Bit.
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
0
1
Enable Bit.
Corresponding status bit cannot issue interrupt.
Corresponding status bit can issue interrupt.
I
I
I
I
I
I
I
I
Corresponding status bit cannot issue interrupt.
Corresponding status bit can issue interrupt.
Corresponding status bit cannot issue interrupt.
Corresponding status bit can issue interrupt.
Corresponding status bit cannot issue interrupt.
Corresponding status bit can issue interrupt.
2
2
2
2
2
2
2
2
S receiver DMA requests disabled.
S receiver DMA requests enabled.
S receiver interrupt requests disabled.
S receiver interrupt requests enabled.
S transmitter DMA requests disabled.
S transmitter DMA requests enabled.
S transmitter interrupt requests disabled.
S transmitter interrupt requests enabled.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
2
2
I2Sx_IER field descriptions (continued)
S to request for DMA transfers. When enabled, DMA requests are generated when any of
S to request for DMA transfers. When enabled, DMA requests are generated when any of
Table continues on the next page...
2
2
S to issue receiver related interrupts to the core.
S to issue transmitter data related interrupts to the core.
Description
Freescale Semiconductor, Inc.