MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1473

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

49.3.3 LCD fault detect control register (LCD_FDCR)
The reset value of this register depends on the reset type:POR -- 0x0000_0000
Address: LCD_FDCR is 400B_E000h base + 8h offset = 400B_E008h
Freescale Semiconductor, Inc.
Reset
Reset
Bit
Bit
W
W
Reserved
Reserved
R
R
FDSWW
FDPRS
31–16
14–12
11–9
Field
15
31
15
0
0
0
30
14
0
0
Reserved
This read-only field is reserved and always has the value zero.
Reserved
This read-only field is reserved and always has the value zero.
Fault detect clock prescaler
Fault detect sample clock frequency is:
0
1
2
3
4
5
6
7
Fault detect sample window width
Specifies the sample window width of fault detection, in number of cycles in the range from 4–512
(Sample window = 4*2
0
1
2
3
FDPRS
1/1 bus clock.
1/2 bus clock.
1/4 bus clock.
1/8 bus clock.
1/16 bus clock.
1/32 bus clock.
1/64 bus clock.
1/128 bus clock.
Sample window width is 4 sample clock cycles.
Sample window width is 8 sample clock cycles.
Sample window width is 16 sample clock cycles.
Sample window width is 32 sample clock cycles.
29
13
0
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
28
12
0
0
27
11
0
0
LCD_FDCR field descriptions
N
).
FDSWW
Table continues on the next page...
26
10
0
0
25
0
0
9
24
0
0
0
8
0
Description
23
0
0
7
22
0
0
6
21
0
0
5
Chapter 49 LCD Controller (SLCD)
20
0
0
4
19
FDPINID
0
0
3
18
0
0
2
17
0
0
1
1473
16
0
0
0