MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 70

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Part Number:
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Core modules
Therefore, the following bitfield locations are used to configure the LPTMR interrupts:
3.2.3 Asynchronous Wake-up Interrupt Controller (AWIC)
This section summarizes how the module has been configured in the chip. Full
documentation for this module is provided by ARM and can be found at
www.arm.com.
70
System memory map
Power management
• NVICISER2[21]
• NVICICER2[21]
• NVICISPR2[21]
• NVICICPR2[21]
• NVICIABR2[21]
• NVICIPR21[15:12]
Clocking
• NVICISER2, NVICICER2, NVICISPR2, NVICICPR2, NVICIABR2 bit
• NVICIPR21 bitfield starting location = 8 * (IRQ mod 4) + 4 = 12
Topic
location = IRQ mod 32 = 21
Since the NVICIPR bitfields are 4-bit wide
bitfield range is 12-15
Configuration
Figure 3-3. Asynchronous Wake-up Interrupt Controller configuration
Table 3-6. Reference links to related information
Interrupt Controller
Nested Vectored
Related module
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
(NVIC)
Table continues on the next page...
Wake-up Interrupt
Controller (AWIC)
Asynchronous
Clock logic
(16 priority
Wake-up
requests
System memory map
Power management
Clock distribution
Reference
NVIC
Module
Module
levels), the NVICIPR21
Freescale Semiconductor, Inc.
http://

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