MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 65

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

3.2.2.3 Interrupt channel assignments
The interrupt source assignments are defined in the following table.
The IRQ number is used within ARM's NVIC documentation.
Freescale Semiconductor, Inc.
ARM Core System Handler Vectors
0x0000_0000
0x0000_0004
0x0000_0008
0x0000_000C
0x0000_0010
0x0000_0014
0x0000_0018
0x0000_001C
0x0000_0020
0x0000_0024
0x0000_0028
0x0000_002C
0x0000_0030
0x0000_0034
0x0000_0038
0x0000_003C
Non-Core Vectors
0x0000_0040
0x0000_0044
0x0000_0048
0x0000_004C
0x0000_0050
• Vector number — the value stored on the stack when an interrupt is serviced.
• IRQ number — non-core interrupt source count, which is the vector number minus
16.
Address
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Vector
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0
1
2
3
4
IRQ
Table 3-4. Interrupt vector assignments
1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0
0
0
0
0
non-IPR
register
number
NVIC
Table continues on the next page...
2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0
0
0
0
1
register
number
NVIC
IPR
3
ARM core
ARM core
ARM core
ARM core
ARM core
ARM core
ARM core
—
—
—
—
ARM core
ARM core
—
ARM core
ARM core
DMA
DMA
DMA
DMA
DMA
Source module
Initial Stack Pointer
Initial Program Counter
Non-maskable Interrupt (NMI)
Hard Fault
MemManage Fault
Bus Fault
Usage Fault
—
—
—
—
Supervisor call (SVCall)
Debug Monitor
—
Pendable request for system service
(PendableSrvReq)
System tick timer (SysTick)
DMA channel 0 transfer complete
DMA channel 1 transfer complete
DMA channel 2 transfer complete
DMA channel 3 transfer complete
DMA channel 4 transfer complete
Chapter 3 Chip Configuration
Source description
65