MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 598

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory Map and Registers
28.33.3 Flash Security Register (FTFL_FSEC)
This read-only register holds all bits associated with the security of the MCU and FTFL
module.
598
ERSSUSP
RAMRDY
EEERDY
PFLSH
SWAP
Field
4
3
2
1
0
This bit issues a request to the memory controller to execute the Erase All Blocks command and release
security. ERSAREQ is not directly writable but is under indirect user control. Refer to the device's Chip
Configuration details on how to request this command.
The ERSAREQ bit sets when an erase all request is triggered external to the FTFL and CCIF is set (no
command is currently being executed). ERSAREQ is cleared by the FTFL when the operation completes.
0
1
Erase Suspend
The ERSSUSP bit allows the user to suspend (interrupt) the Erase Flash Sector command while it is
executing.
0
1
Swap
For program flash only configurations, the SWAP flag indicates which physical program flash block is
located at relative address 0x0000. The state of the SWAP flag is set by the FTFL during the reset
sequence . See the Swap Control command section for information on swap management.
0
1
FTFL configuration
0
1
RAM Ready
This flag indicates the current status of the programming acceleration RAM .
This bit should always be set.
0
1
This field is reserved.
0
1
No request or request complete
Request to:
No suspend requested
Suspend the current Erase Flash Sector command execution.
Physical program flash 0 is located at relative address 0x0000
If the PFLSH flag is set, physical program flash 1 is located at relative address 0x0000. If the PFLSH
flag is not set, physical program flash 0 is located at relative address 0x0000
Reserved
FTFL configured for program flash only, without support for data flash and/or EEPROM
Programming acceleration RAM is not available.
Programming acceleration RAM is available.
1. run the Erase All Blocks command,
2. verify the erased state,
3. program the security byte in the Flash Configuration Field to the unsecure state, and
4. release MCU security by setting the FSEC[SEC] field to the unsecure state.
FTFL_FCNFG field descriptions (continued)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Description
Freescale Semiconductor, Inc.