MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1284

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory map and register definition
1284
Reserved
Reserved
ADMAS
DMAS
18–16
15–0
Field
SRS
HSS
MBL
23
22
21
20
19
Suspend/Resume Support
This bit indicates whether the SDHC supports suspend / resume functionality. If this bit is 0, the suspend
and resume mechanism, as well as the read Wwait, are not supported, and the host driver shall not issue
either suspend or resume commands.
0b
1b
DMA Support
This bit indicates whether the SDHC is capable of using the internal DMA to transfer data between system
memory and the data buffer directly.
0b
1b
High Speed Support
This bit indicates whether the SDHC supports high speed mode and the host system can supply a SD
Clock frequency from 25 MHz to 50 MHz.
0b
1b
ADMA Support
This bit indicates whether the SDHC supports the ADMA feature.
0b
1b
This read-only field is reserved and always has the value zero.
Max Block Length
This value indicates the maximum block size that the host driver can read and write to the buffer in the
SDHC. The buffer shall transfer block size without wait cycles.
000b
001b
010b
011b
This read-only field is reserved and always has the value zero.
Not supported
Supported
DMA not supported
DMA supported
High speed not supported
High speed supported
Advanced DMA not supported
Advanced DMA supported
512 bytes
1024 bytes
2048 bytes
4096 bytes
SDHC_HTCAPBLT field descriptions (continued)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Description
Freescale Semiconductor, Inc.