MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 294

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Mode Control Memory Map/Register Definition
13.2.3 Power Mode Protection Register (MC_PMPROT)
This write-once register allows low power or low leakage modes to be entered. The
actual enabling of the low power or low leakage modes is done by configuring the power
mode control register (PMCTRL).
294
WAKEUP
Reserved
COP
Field
LOC
LVD
PIN
4–3
6
5
2
1
0
0
1
External reset pin
Indicates reset was caused by an active-low level on the external RESETpin.
0
1
Computer Operating Properly (COP) Watchdog
Reset was caused by the COP watchdog timer timing out. This reset source can be blocked by disabling
the watchdog. For more information, see the watchdog chapter.
0
1
This read-only field is reserved and always has the value zero.
Loss-of-clock reset
Indicates reset was caused by a loss of external clock. The MCG clock monitor must be enabled for a loss
of clock to be detected. See the MCG chapter for information on enabling the clock monitor.
0
1
Low-voltage detect reset
If the LVDRE bit is set and the supply drops below the LVD trip voltage, an LVD reset occurs. This bit is
also set by POR.
0
1
Low-leakage wakeup reset
Reset was caused by an enabled LLWU module wakeup source while the device was in LLS or VLLS
modes. Wakeup sources in LLS is limited to the RESET pin. In VLLS, any enabled wakeup source causes
a reset. This bit is cleared by any reset except WAKEUP.
0
1
Reset not caused by POR
Reset caused by POR
Reset not caused by external reset pin
Reset caused by external reset pin
Reset not caused by COP timeout
Reset caused by COP timeout
Reset not caused by a loss of external clock.
Reset caused by a loss of external clock.
Reset not caused by LVD trip or POR
Reset caused by LVD trip or POR
Reset not caused by LLWU module wakeup source
Reset caused by LLWU module wakeup source
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
MC_SRSL field descriptions (continued)
Description
Freescale Semiconductor, Inc.