MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 838

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
Memory Map and Register Definition
36.3.25 FTM Inverting Control (FTMx_INVCTRL)
This register controls controls when the channel (n) output becomes the channel (n+1)
output, and channel (n+1) output becomes the channel (n) output. Each INVmEN bit
enables the inverting operation for the corresponding pair channels m.
This register has a write buffer. The INVmEN bit is updated by the INVCTRL register
synchronization.
Addresses: FTM0_INVCTRL is 4003_8000h base + 90h offset = 4003_8090h
838
Bit
W
R
HWTRIGMODE
Reserved
Reserved
31
0
INV3EN
INV2EN
INV1EN
31–4
Field
Field
30
1
0
3
2
1
0
FTM1_INVCTRL is 4003_9000h base + 90h offset = 4003_9090h
FTM2_INVCTRL is 400B_8000h base + 90h offset = 400B_8090h
29
0
28
0
0
1
This read-only field is reserved and always has the value zero.
Hardware Trigger Mode
0
1
This read-only field is reserved and always has the value zero.
Pair Channels 3 Inverting Enable
0
1
Pair Channels 2 Inverting Enable
0
1
Pair Channels 1 Inverting Enable
27
0
CNTIN register is updated with its buffer value at all rising edges of system clock.
CNTIN register is updated with its buffer value by the PWM synchronization.
FTM clears the TRIGj bit when the hardware trigger j is detected.
FTM does not clear the TRIGj bit when the hardware trigger j is detected.
Inverting is disabled.
Inverting is enabled.
Inverting is disabled.
Inverting is enabled.
26
0
25
0
FTMx_SYNCONF field descriptions (continued)
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
23
0
FTMx_INVCTRL field descriptions
22
0
21
0
Table continues on the next page...
20
0
19
0
18
0
0
17
0
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
4
0
0
3
0
2
0
1
0
0