MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 270

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Reset
Memory map and register definition
12.2.16 System Clock Divider Register 2 (SIM_CLKDIV2)
Address: SIM_CLKDIV2 is 4004_7000h base + 1048h offset = 4004_8048h
270
Bit
W
R
Reserved
Reserved
I2SFRAC
Reserved
Reserved
Reserved
31
0
I2SDIV
31–20
19–16
15–0
15–8
Field
Field
7–4
3–1
30
0
0
29
0
28
0
This read-only field is reserved and always has the value zero.
I2S clock divider value
This field sets the divide value for when the fractional clock divider is used as the source for the I
master clock. The clock input to the fractional clock divider is set by the SOPT2[I2SSRC] bit.
Divider output clock = Divider input clock × [(I2SFRAC+1) / (I2SDIV+1) ]
NOTE: The I2S clock must be disabled (SCGC6[I2S] = 0) before altering this bitfield.
This read-only field is reserved and always has the value zero.
I2S clock divider fraction
This field sets the multiply value for when the fractional clock divider is used as a the source for I
master clock. The clock input to the fractional clock divider is set by the SOPT2[I2SSRC] bit.
Divider output clock = Divider input clock × [(I2SFRAC+1) / (I2SDIV+1) ]
NOTE: The I2S clock must be disabled (SCGC6[I2S] = 0) before altering this bitfield.
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value zero.
27
0
I2SDIV
26
0
25
0
24
SIM_CLKDIV1 field descriptions (continued)
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
23
0
22
0
SIM_CLKDIV2 field descriptions
21
0
20
0
19
0
18
0
0
17
0
16
0
15
0
Description
Description
14
0
13
0
I2SFRAC
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
0
5
4
0
0
3
2
2
0
0
2
S
S
0
1
0
0
0

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