MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 412

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory map/register definition
412
4000_90FC
4000_90FE
4000_90FE
4000_910C
4000_911C
4000_911E
4000_911E
4000_9100
4000_9104
4000_9106
4000_9108
4000_9108
4000_9108
4000_9110
4000_9114
4000_9116
4000_9116
4000_9118
4000_9120
Absolute
address
(hex)
TCD Control and Status (DMA_TCD7_CSR)
TCD Beginning Minor Loop Link, Major Loop Count
(Channel Linking Enabled)
(DMA_TCD7_BITER_ELINKYES)
TCD Beginning Minor Loop Link, Major Loop Count
(Channel Linking Disabled)
(DMA_TCD7_BITER_ELINKNO)
TCD Source Address (DMA_TCD8_SADDR)
TCD Signed Source Address Offset (DMA_TCD8_SOFF)
TCD Transfer Attributes (DMA_TCD8_ATTR)
TCD Minor Byte Count (Minor Loop Disabled)
(DMA_TCD8_NBYTES_MLNO)
TCD Signed Minor Loop Offset (Minor Loop Enabled and
Offset Disabled) (DMA_TCD8_NBYTES_MLOFFNO)
TCD Signed Minor Loop Offset (Minor Loop and Offset
Enabled) (DMA_TCD8_NBYTES_MLOFFYES)
TCD Last Source Address Adjustment
(DMA_TCD8_SLAST)
TCD Destination Address (DMA_TCD8_DADDR)
TCD Signed Destination Address Offset
(DMA_TCD8_DOFF)
TCD Current Minor Loop Link, Major Loop Count (Channel
Linking Enabled) (DMA_TCD8_CITER_ELINKYES)
DMA_TCD8_CITER_ELINKNO
TCD Last Destination Address Adjustment/Scatter Gather
Address (DMA_TCD8_DLASTSGA)
TCD Control and Status (DMA_TCD8_CSR)
TCD Beginning Minor Loop Link, Major Loop Count
(Channel Linking Enabled)
(DMA_TCD8_BITER_ELINKYES)
TCD Beginning Minor Loop Link, Major Loop Count
(Channel Linking Disabled)
(DMA_TCD8_BITER_ELINKNO)
TCD Source Address (DMA_TCD9_SADDR)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Register name
DMA memory map (continued)
Table continues on the next page...
(in bits)
Width
16
16
16
32
16
16
32
32
32
32
32
16
16
16
32
16
16
16
32
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Freescale Semiconductor, Inc.
Reset value
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Section/
21.3.29/
21.3.30/
21.3.31/
21.3.17/
21.3.18/
21.3.19/
21.3.20/
21.3.21/
21.3.22/
21.3.23/
21.3.24/
21.3.25/
21.3.26/
21.3.27/
21.3.28/
21.3.29/
21.3.30/
21.3.31/
21.3.17/
page
450
452
453
441
442
442
443
444
445
446
446
447
447
448
449
450
452
453
441