MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 391

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

20.4 Functional description
This section provides the functional description of the DMA MUX.
The primary purpose of the DMA MUX is to provide flexibility in the system's use of the
available DMA channels. As such, configuration of the DMA MUX is intended to be a
static procedure done during execution of the system boot code. However, if the
procedure outlined in
the DMA MUX may be changed during the normal operation of the system.
Functionally, the DMA MUX channels may be divided into two classes: Channels, which
implement the normal routing functionality plus periodic triggering capability, and
channels, which implement only the normal routing functionality.
20.4.1 DMA channels with periodic triggering capability
Besides the normal routing functionality, the first four channels of the DMA MUX
provide a special periodic triggering capability that can be used to provide an automatic
mechanism to transmit bytes, frames or packets at fixed intervals without the need for
processor intervention. The trigger is generated by the periodic interrupt timer (PIT); as
Freescale Semiconductor, Inc.
SOURCE
ENBL
TRIG
Field
5–0
7
6
DMA Channel Enable
Enables the DMA channel
0
1
DMA Channel Trigger Enable
Enables the periodic trigger capability for the triggered DMA channel
0
1
DMA Channel Source (slot)
Specifies which DMA source, if any, is routed to a particular DMA channel. Please check your device's
Chip Configuration details for further details about the peripherals and their slot numbers.
DMA channel is disabled. This mode is primarily used during configuration of the DMA Mux. The DMA
has separate channel enables/disables, which should be used to disable or re-configure a DMA
channel.
DMA channel is enabled
Triggering is disabled. If triggering is disabled, and the ENBL bit is set, the DMA Channel will simply
route the specified source to the DMA channel. (normal mode)
Triggering is enabled. If triggering is enabled, and the ENBL bit is set, the DMAMUX is in periodic
trigger mode.
Enabling and configuring sources
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
DMAMUX_CHCFGn field descriptions
Chapter 20 Direct memory access multiplexer (DMAMUX)
Description
is followed, the configuration of
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