MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 622

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Flash Operation in Low-Power Modes
28.4.10.8 Program Section Command
The Program Section operation programs the data found in the section program buffer to
previously erased locations in the flash memory using an embedded algorithm. Data is
preloaded into the section program buffer (see
The section program buffer is limited to the lower half of the RAM. Data written to the
upper half of the RAM is ignored and may be overwritten during Program Section
command execution.
1. Must be phrase aligned (Flash address [2:0] = 000).
After clearing CCIF to launch the Program Section command, the FTFL blocks access to
the programming acceleration RAM and programs the data residing in the section
program buffer into the flash memory starting at the flash address provided.
The starting address must be unprotected (see the description of the FPROT registers) to
permit execution of the Program Section operation. The swap indicator address in each
program flash block is implicitly protected from erase. If the swap indicator address is
encountered during the Program Section operation, it is bypassed without setting
FPVIOL and the contents are not programmed. Programming, which is not allowed to
cross a flash sector boundary, continues until all requested phrases have been
programmed. The Program Section command also verifies that after programming, all
bits requested to be programmed are programmed.
622
FCCOB Number
0
1
2
3
4
5
A flash memory location must be in the erased state before
being programmed. Cumulative programming of bits (back-to-
back program operations without an intervening erase) within a
flash memory location is not allowed. Re-programming of
existing 0s to 0 is not allowed as this overstresses the device.
Table 28-45. Program Section Command FCCOB Requirements
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
CAUTION
Number of phrases to program [15:8]
Number of phrases to program [7:0]
FCCOB Contents [7:0]
Flash address [23:16]
Flash address [15:8]
Flash Sector
Flash address [7:0]
0x0B (PGMSEC)
Programming).
1
Freescale Semiconductor, Inc.

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