MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 618

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Flash Operation in Low-Power Modes
The supplied address must be longword aligned (flash address [1:0] = 00):
28.4.10.6 Erase Flash Block Command
The Erase Flash Block operation erases all addresses in a single program flash.
1. Must be longword aligned (Flash address [1:0] = 00).
Upon clearing CCIF to launch the Erase Flash Block command, the FTFL erases the
main array of the selected flash block and verifies that it is erased. The Erase Flash Block
command aborts and sets the FSTAT[FPVIOL] bit if any region within the block is
protected (see the description of the FPROT registers). The swap indicator address in
each program flash block is implicitly protected from block erase unless the swap system
is in the UPDATE or UPDATE-ERASED state and the program flash block being erased
is the non-active block. If the erase verify fails, the MGSTAT0 bit in FSTAT is set. The
CCIF flag will set after the Erase Flash Block operation has completed.
618
Command not available in current mode/security
An invalid flash address is supplied
Flash address is not longword aligned
Flash address points to a protected area
Any errors have been encountered during the verify operation
Command not available in current mode/security
Error Condition
Error Condition
• Byte 0 data is written to the supplied address ('start'),
• Byte 1 data is programmed to byte address start+0b01,
• Byte 2 data is programmed to byte address start+0b10, and
• Byte 3 data is programmed to byte address start+0b11.
FCCOB Number
0
1
2
3
Table 28-41. Erase Flash Block Command FCCOB Requirements
Table 28-40. Program Longword Command Error Handling
Table 28-42. Erase Flash Block Command Error Handling
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Table continues on the next page...
Flash address [23:16] in the flash block to be erased
Flash address [15:8] in the flash block to be erased
Flash address [7:0]
FCCOB Contents [7:0]
0x08 (ERSBLK)
1
in the flash block to be erased
Freescale Semiconductor, Inc.
FSTAT[MGSTAT0]
FSTAT[ACCERR]
FSTAT[ACCERR]
FSTAT[ACCERR]
FSTAT[ACCERR]
FSTAT[FPVIOL]
Error Bit
Error Bit

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