MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1020

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
Memory Map/Register Definition
41.3.16 CRC Register (CANx_CRCR)
This register provides information about the CRC of transmitted messages.
Addresses: CAN0_CRCR is 4002_4000h base + 44h offset = 4002_4044h
41.3.17 Rx FIFO Global Mask Register (CANx_RXFGMASK)
This register is located in RAM.
1020
Bit
W
R
Reserved
Reserved
Reserved
31
0
MBCRC
TXCRC
31–23
22–16
12–0
14–0
Field
Field
15
30
0
29
0
28
0
This bit is cleared in all start of arbitration (see Section "Arbitration process").
NOTE: LPTM mechanism have the following behavior: if an MB is successfully transmitted and
0
1
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value zero.
CRC Mailbox
This field indicates the number of the Mailbox corresponding to the value in TXCRC field.
This read-only field is reserved and always has the value zero.
CRC Transmitted
This field indicates the CRC value of the last message transmitted. This field is updated at the same time
the Tx Interrupt Flag is asserted.
27
0
0
• During arbitration, if an LPTM is found and it is inactive.
• If IMB is not asserted and a frame is transmitted successfully.
If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox.
If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the
first one.
26
0
25
0
ESR2[IMB]=0 (no inactive Mailbox), then ESR2[VPS] and ESR2[IMB] are asserted and the index
related to the MB just transmitted is loaded into ESR2[LPTM].
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
CANx_ESR2 field descriptions (continued)
23
0
22
0
CANx_CRCR field descriptions
21
0
20
0
MBCRC
19
0
18
0
17
0
16
0
15
0
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
TXCRC
Freescale Semiconductor, Inc.
0
7
0
6
0
5
4
0
0
3
0
2
0
1
0
0