MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 581

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
27.4.9 Cache Data Storage (lower word) (FMC_DATAW0SL)
The cache of 64-bit entries is a 4-way, set-associative cache with 8 sets. The ways are
numbered 0-3 and the sets are numbered 0-7. In DATAWxSyU and DATAWxSyL, x
denotes the way, y denotes the set, and U and L represent upper and lower word,
respectively. This section represents data for the lower word (bits [31:0]) of all 8 sets
(n=0-7) in way 0.
Addresses: FMC_DATAW0S0L is 4001_F000h base + 204h offset = 4001_F204h
Freescale Semiconductor, Inc.
Bit
W
R
data[31:0]
31
0
31–0
Field
30
0
FMC_DATAW0S1L is 4001_F000h base + 20Ch offset = 4001_F20Ch
FMC_DATAW0S2L is 4001_F000h base + 214h offset = 4001_F214h
FMC_DATAW0S3L is 4001_F000h base + 21Ch offset = 4001_F21Ch
FMC_DATAW0S4L is 4001_F000h base + 224h offset = 4001_F224h
FMC_DATAW0S5L is 4001_F000h base + 22Ch offset = 4001_F22Ch
FMC_DATAW0S6L is 4001_F000h base + 234h offset = 4001_F234h
FMC_DATAW0S7L is 4001_F000h base + 23Ch offset = 4001_F23Ch
29
0
28
0
Bits [31:0] of data entry
27
0
26
0
25
0
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
23
0
FMC_DATAW0SnL field descriptions
22
0
21
0
20
0
19
0
18
0
17
0
data[31:0]
16
0
15
0
Description
14
0
13
0
12
0
Chapter 27 Flash Memory Controller (FMC)
11
0
10
0
0
9
0
8
0
7
0
6
0
5
4
0
0
3
0
2
0
1
581
0
0