MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 497

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

The watchdog can also generate an interrupt. If IRQ_RST_EN is set, then on the above
mentioned events WDOG_ST_CTRL_L[INT_FLG] is set, generating an interrupt. A
watchdog reset is also generated WCT time later to ensure the watchdog is fault tolerant.
The interrupt can be cleared by writing 1 to INT_FLG.
The gap of WCT time between interrupt and reset means that the WDOG time-out value
must be greater than WCT. Otherwise, if the interrupt was generated due to a time-out, a
second consecutive time-out will occur in that WCT gap. This will trigger the backup
reset generator to generate a reset to the system, prematurely ending the interrupt service
routine execution. Also, the jobs like counting the number of watchdog resets would not
be done.
23.7 Memory Map and Register Definition
This section consists of the memory map and register descriptions.
Freescale Semiconductor, Inc.
4005_200A
4005_200C
4005_200E
4005_2000
4005_2002
4005_2004
4005_2006
4005_2008
4005_2010
4005_2012
Absolute
• A gap of more than 20 bus cycles exists between the writes of two values of the
• A gap of more than 20 bus cycles exists between the writes of two values of the
address
(hex)
unlock sequence.
refresh sequence.
Watchdog Status and Control Register High
(WDOG_STCTRLH)
Watchdog Status and Control Register Low
(WDOG_STCTRLL)
Watchdog Time-out Value Register High (WDOG_TOVALH)
Watchdog Time-out Value Register Low (WDOG_TOVALL)
Watchdog Window Register High (WDOG_WINH)
Watchdog Window Register Low (WDOG_WINL)
Watchdog Refresh Register (WDOG_REFRESH)
Watchdog Unlock Register (WDOG_UNLOCK)
Watchdog Timer Output Register High (WDOG_TMROUTH)
Watchdog Timer Output Register Low (WDOG_TMROUTL)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Register name
Table continues on the next page...
WDOG memory map
(in bits)
Width
16
16
16
16
16
16
16
16
16
16
Chapter 23 Watchdog Timer (WDOG)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset value
4B4Ch
01D3h
004Ch
B480h
D928h
0001h
0000h
0010h
0000h
0000h
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23.7.5/501
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23.7.7/502
23.7.8/502
23.7.9/503
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23.7.10/
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