MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 882

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Functional Description
If (SYNCMODE = 0), (REINIT = 1) and (PWMSYNC = 1) then this synchronization is
made on the next enabled hardware trigger. The TRIGn bit is cleared according to
Hardware
882
Figure 36-223. FTM Counter Synchronization with (SYNCMODE = 0), (HWTRIGMODE =
Figure 36-224. FTM Counter Synchronization with (SYNCMODE = 0), (HWTRIGMODE =
Figure 36-222. FTM Counter Synchronization with (SYNCMODE = 0), (REINIT = 1),
0), (REINIT = 1), (PWMSYNC = 0), and (a Hardware Trigger Was Used)
0), (REINIT = 1), (PWMSYNC = 1), and (a Hardware Trigger Was Used)
Trigger.
write 1 to SWSYNC bit
software trigger event
write 1 to TRIG0 bit
write 1 to TRIG0 bit
(PWMSYNC = 0), and (Software Trigger Was Used)
system clock
SWSYNC bit
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
trigger 0 event
trigger 0 event
system clock
system clock
TRIG0 bit
TRIG0 bit
FTM counter is updated with the CNTIN register value
and channel outputs are forced to their initial value
FTM counter is updated with the CNTIN register value
FTM counter is updated with the CNTIN register value
and channel outputs are forced to their initial value
and channel outputs are forced to their initial value
Freescale Semiconductor, Inc.