MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 889

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

36.4.15 Output Mask
The output mask can be used to force channels output to their inactive state through
software (for example: to control a BLDC motor).
Any write to the OUTMASK register updates its write buffer. The OUTMASK register is
updated with its buffer value by PWM synchronization
Synchronization).
If CHnOM = 1, then the channel (n) output is forced to its inactive state (POLn bit value).
If CHnOM = 0, then the channel (n) output is unaffected by the output mask (see the
following figure).
The following table shows the output mask result before the polarity control.
Freescale Semiconductor, Inc.
Table 36-244. Output Mask Result for Channel (n) (Before the Polarity
channel (n) output
(before output mask)
channel (n) output
(after output mask)
CHnOM bit
CHnOM
FTM counter
0
1
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Control)
Figure 36-232. Output Mask with POLn = 0
to be available in the channel (n) output
the beginning of new PWM cycles
configured PWM signal starts
Output Mask Input
inactive state
inactive state
active state
active state
(OUTMASK Register
channel (n) output is disabled
Output Mask Result
Chapter 36 FlexTimer (FTM)
inactive state
inactive state
active state
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