MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 571

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Freescale Semiconductor, Inc.
M4AP[1:0]
M3AP[1:0]
M2AP[1:0]
M1AP[1:0]
M0AP[1:0]
Field
9–8
7–6
5–4
3–2
1–0
This field controls whether read and write access to the flash are allowed based on the logical master
number of the requesting crossbar switch master.
00
01
10
11
Master 4 Access Protection
This field controls whether read and write access to the flash are allowed based on the logical master
number of the requesting crossbar switch master.
00
01
10
11
Master 3 Access Protection
This field controls whether read and write access to the flash are allowed based on the logical master
number of the requesting crossbar switch master.
00
01
10
11
Master 2 Access Protection
This field controls whether read and write access to the flash are allowed based on the logical master
number of the requesting crossbar switch master.
00
01
10
11
Master 1 Access Protection
This field controls whether read and write access to the flash are allowed based on the logical master
number of the requesting crossbar switch master.
00
01
10
11
Master 0 Access Protection
This field controls whether read and write access to the flash are allowed based on the logical master
number of the requesting crossbar switch master.
00
01
No access may be performed by this master
Only read accesses may be performed by this master
Only write accesses may be performed by this master
Both read and write accesses may be performed by this master
No access may be performed by this master
Only read accesses may be performed by this master
Only write accesses may be performed by this master
Both read and write accesses may be performed by this master
No access may be performed by this master
Only read accesses may be performed by this master
Only write accesses may be performed by this master
Both read and write accesses may be performed by this master
No access may be performed by this master
Only read accesses may be performed by this master
Only write accesses may be performed by this master
Both read and write accesses may be performed by this master
No access may be performed by this master
Only read accesses may be performed by this master
Only write accesses may be performed by this master
Both read and write accesses may be performed by this master
No access may be performed by this master
Only read accesses may be performed by this master
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
FMC_PFAPR field descriptions (continued)
Table continues on the next page...
Description
Chapter 27 Flash Memory Controller (FMC)
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