MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 449

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
21.3.28 TCD Last Destination Address Adjustment/Scatter Gather
Addresses: 4000_8000h base + 1018h offset + (32d × n), where n = 0d to 15d
* Notes:
•
Freescale Semiconductor, Inc.
Bit
W
R
DLASTSGA
x = Undefined at reset.
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
31
CITER
ELINK
14–0
31–0
Field
Field
15
30
29
Address (DMA_TCD_DLASTSGA)
28
Enable channel-to-channel linking on minor-loop complete
As the channel completes the minor loop, this flag enables linking to another channel, defined by the
LINKCH field. The link target channel initiates a channel service request via an internal mechanism that
sets the TCDn_CSR[START] bit of the specified channel.
If channel linking is disabled, the CITER value is extended to 15 bits in place of a link channel number. If
the major loop is exhausted, this link mechanism is suppressed in favor of the MAJORELINK channel
linking.
NOTE: This bit must be equal to the BITER[ELINK] bit. Otherwise, a configuration error is reported.
0
1
Current Major Iteration Count
This 9-bit (ELINK = 1) or 15-bit (ELINK = 0) count represents the current major loop count for the channel.
It is decremented each time the minor loop is completed and updated in the transfer control descriptor
memory. After the major iteration count is exhausted, the channel performs a number of operations (e.g.,
final source and destination address calculations), optionally generating an interrupt to signal channel
completion before reloading the CITER field from the beginning iteration count (BITER) field.
NOTE: When the CITER field is initially loaded by software, it must be set to the same value as that
NOTE: If the channel is configured to execute a single service request, the initial values of BITER and
Destination last address adjustment or the memory address for the next transfer control descriptor to be
loaded into this channel (scatter/gather).
If (TCDn_CSR[ESG] = 0) then
27
• Adjustment value added to the destination address at the completion of the major iteration count.
The channel-to-channel linking is disabled
The channel-to-channel linking is enabled
26
This value can apply to restore the destination address to the initial value or adjust the address to
reference the next data structure.
25
contained in the BITER field.
CITER should be 0x0001.
DMA_TCDn_CITER_ELINKNO field descriptions
24
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
DMA_TCDn_DLASTSGA field descriptions
23
22
21
20
19
18
17
DLASTSGA
16
15
Description
Description
14
Chapter 21 Direct Memory Access Controller (eDMA)
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