MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 445

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
21.3.22 TCD Signed Minor Loop Offset (Minor Loop and Offset
TCD word 2 is defined as follows if:
If minor loop mapping is enabled and SMLOE and DMLOE are cleared then refer to the
TCD_NBYTES_MLOFFNO register description.
Addresses: 4000_8000h base + 1008h offset + (32d × n), where n = 0d to 15d
* Notes:
•
Freescale Semiconductor, Inc.
Bit
W
R
• Minor loop mapping is enabled (CR[EMLM] = 1) and
• Minor loop offset enabled (SMLOE or DMLOE = 1)
x = Undefined at reset.
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
31
SMLOE
DMLOE
MLOFF
29–10
Field
Field
31
30
30
29
Enabled) (DMA_TCD_NBYTES_MLOFFYES)
28
DMA_TCDn_NBYTES_MLOFFNO field descriptions (continued)
As a channel activates, the appropriate TCD contents load into the eDMA engine, and the appropriate
reads and writes perform until the minor byte transfer count has transferred. This is an indivisible
operation and cannot be halted; although, it may be stalled by using the bandwidth control field, or via
preemption. After the minor count is exhausted, the SADDR and DADDR values are written back into the
TCD memory, the major iteration count is decremented and restored to the TCD memory. If the major
iteration count is completed, additional processing is performed.
Source Minor Loop Offset Enable
Selects whether the minor loop offset is applied to the source address upon minor loop completion.
0
1
Destination Minor Loop Offset enable
Selects whether the minor loop offset is applied to the destination address upon minor loop completion.
0
1
If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or
destination address to form the next-state value after the minor loop completes.
27
The minor loop offset is not applied to the SADDR
The minor loop offset is applied to the SADDR
The minor loop offset is not applied to the DADDR
The minor loop offset is applied to the DADDR
26
DMA_TCDn_NBYTES_MLOFFYES field descriptions
25
24
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
23
22
21
Table continues on the next page...
MLOFF
20
19
18
17
16
15
Description
Description
14
Chapter 21 Direct Memory Access Controller (eDMA)
13
12
11
10
9
8
7
6
NBYTES
5
4
3
2
1
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