MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 912

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Functional Description
The following figure shows motor jittering produced by the phase B and A pulses
respectively. The first highlighted transition causes a jitter on the FTM counter value near
the maximum count value (MOD). The second indicated transition occurs on phase A and
causes the FTM counter transition between the maximum and minimum count values
which are defined by MOD and CNTIN registers.
The appropriate settings of the phase A and phase B input filters are important to avoid
glitches that may cause oscillation on the FTM counter value. The preceding figures
show examples of oscillations that can be caused by poor input filter setup. Thus, it is
important to guarantee a minimum pulse width to avoid these oscillations.
36.4.26 BDM Mode
When the chip is in BDM mode, the BDMODE[1:0] bits select the behavior of the FTM
counter, the CH(n)F bit, the channels output, and the writes to the MOD, CNTIN, and
C(n)V registers according to the following table.
912
BDMMODE
FTM counter
Figure 36-256. Motor Position Jittering Near Maximum and Minimum Count Value
00
01
CNTIN
0x0000
phase B
phase A
MOD
Stopped
Stopped
Counter
FTM
Table 36-249. FTM Behavior When the Chip Is in BDM Mode
CH(n)F Bit FTM Channels Output
can be set
is not set
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Functional mode
The channels outputs are forced
to their safe value according to
POLn bit
Table continues on the next page...
Writes to these registers bypass the registers
buffers
Writes to these registers bypass the registers
buffers
Writes to MOD, CNTIN, and C(n)V Registers
Freescale Semiconductor, Inc.
Time

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