MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 309

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
15.3 Memory map/register definition
The LLWU includes the following registers:
15.3.1 LLWU Pin Enable 1 Register (LLWU_PE1)
LLWU_PE1 contains the bit field to enable and select the edge detect type for the
external wakeup input pins LLWU_P3-LLWU_P0.
Freescale Semiconductor, Inc.
4007_C000
4007_C001
4007_C002
4007_C003
4007_C004
4007_C005
4007_C006
4007_C007
4007_C008
Absolute
• Five 8-bit wakeup source enable registers
• Three 8-bit wakeup flag registers
• One 8-bit status and control register
address
(hex)
• Enable external pin input sources
• Enable internal peripheral sources
• Indication of wakeup up source that caused exit from LLS or VLLS includes
• Digital filter enable for external pin detected and reset
• Low leakage reset pin enable
• Acknowledge bit to allow certain peripherals and pads to release their held low
external pin or internal module interrupt
leakage state
LLWU Pin Enable 1 Register (LLWU_PE1)
LLWU Pin Enable 2 Register (LLWU_PE2)
LLWU Pin Enable 3 Register (LLWU_PE3)
LLWU Pin Enable 4 Register (LLWU_PE4)
LLWU Module Enable Register (LLWU_ME)
LLWU Flag 1 Register (LLWU_F1)
LLWU Flag 2 Register (LLWU_F2)
LLWU Flag 3 Register (LLWU_F3)
LLWU Control and Status Register (LLWU_CS)
This register is unaffected by wakeup from low leakage modes
(exit from LLS via RESET or any exit from VLLS).
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Register name
LLWU memory map
NOTE
Chapter 15 Low-leakage wake-up unit (LLWU)
(in bits)
Width
8
8
8
8
8
8
8
8
8
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset value
00h
00h
00h
00h
00h
00h
00h
00h
04h
15.3.1/309
15.3.2/310
15.3.3/312
15.3.4/313
15.3.5/314
15.3.6/315
15.3.7/317
15.3.8/319
15.3.9/320
Section/
page
309

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