MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 974

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Register definition
40.2.6 RTC Status Register (RTC_SR)
Address: RTC_SR is 4003_D000h base + 14h offset = 4003_D014h
974
Reset
Reset
Bit
Bit
W
W
Reserved
Reserved
R
R
31–5
Field
TCE
TOF
TAF
TIF
4
3
2
1
0
31
15
0
0
30
14
0
0
This read-only field is reserved and always has the value zero.
Time Counter Enable
When time counter is disabled the TSR register and TPR register are writeable, but do not increment.
When time counter is enabled the TSR register and TPR register are not writeable, but increment.
0
1
This read-only field is reserved and always has the value zero.
Time Alarm Flag
Time alarm flag is set when the TAR[TAR] equals the TSR[TSR] and the TSR[TSR] increments. This bit is
cleared by writing the TAR register.
0
1
Time Overflow Flag
Time overflow flag is set when the time counter is enabled and overflows. The TSR and TPR do not
increment and read as zero when this bit is set. This bit is cleared by writing the TSR register when the
time counter is disabled.
0
1
Time Invalid Flag
The time invalid flag is set on VBAT POR or software reset. The TSR and TPR do not increment and read
as zero when this bit is set. This bit is cleared by writing the TSR register when the time counter is
disabled.
0
1
Time counter is disabled.
Time counter is enabled.
Time alarm has not occurred.
Time alarm has occurred.
Time overflow has not occurred.
Time overflow has occurred and time counter is read as zero.
Time is valid.
Time is invalid and time counter is read as zero.
29
13
0
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
28
12
0
0
27
11
0
0
RTC_SR field descriptions
26
10
0
0
0
25
0
0
9
24
0
0
8
0
Description
23
0
0
7
22
0
0
6
21
0
0
5
TCE
20
0
0
4
Freescale Semiconductor, Inc.
19
0
0
0
3
TAF
18
0
0
2
TOF
17
0
0
1
TIF
16
0
1
0

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