MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1115

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

42.5.2 Switching Master and Slave Mode
When changing modes in the DSPI, follow the steps below to guarantee proper operation.
42.5.3 Baud Rate Settings
The following table shows the baud rate that is generated based on the combination of the
baud rate prescaler PBR and the baud rate scaler BR in the CTAR registers. The values
calculated assume a 100 MHz system frequency and the double baud rate DBR bit is
clear.
Freescale Semiconductor, Inc.
10. Enable DMA channel by enabling the DMA enable request for the DMA channel
11. Enable serial transmission and serial reception of data by clearing the EOQF bit.
7. Modify DMA descriptor of TX and RX channels for new queues
8. Flush TX FIFO by writing a '1' to the CLR_TXF bit in the MCR. Flush RX FIFO by
9. Clear transfer count either by setting CTCNT bit in the command word of the first
1. Halt the DSPI by setting MCR[HALT].
2. Clear the transmit and receive FIFOs by writing a 1 to the CLR_TXF and CLR_RXF
3. Set the appropriate mode in MCR[MSTR] and enable the DSPI by clearing
writing a '1' to the CLR_RXF bit in the MCR.
entry in the new queue or via CPU writing directly to SPI_TCNT field in the TCR.
assigned to the DSPI TX FIFO, and RX FIFO by setting the corresponding DMA set
enable request bit.
bits in MCR.
MCR[HALT].
The clock frequency mentioned above is given as an example in
this chapter. Refer to the clocking chapter for the frequency
used to drive this module in the device.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
NOTE
Chapter 42 SPI (DSPI)
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