MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 410

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Memory map/register definition
410
4000_90AC
4000_90BC
4000_90CC
4000_90A6
4000_90A8
4000_90A8
4000_90A8
4000_90B0
4000_90B4
4000_90B6
4000_90B6
4000_90B8
4000_90BE
4000_90BE
4000_90C0
4000_90C4
4000_90C6
4000_90C8
4000_90C8
4000_90C8
Absolute
address
(hex)
TCD Transfer Attributes (DMA_TCD5_ATTR)
TCD Minor Byte Count (Minor Loop Disabled)
(DMA_TCD5_NBYTES_MLNO)
TCD Signed Minor Loop Offset (Minor Loop Enabled and
Offset Disabled) (DMA_TCD5_NBYTES_MLOFFNO)
TCD Signed Minor Loop Offset (Minor Loop and Offset
Enabled) (DMA_TCD5_NBYTES_MLOFFYES)
TCD Last Source Address Adjustment
(DMA_TCD5_SLAST)
TCD Destination Address (DMA_TCD5_DADDR)
TCD Signed Destination Address Offset
(DMA_TCD5_DOFF)
TCD Current Minor Loop Link, Major Loop Count (Channel
Linking Enabled) (DMA_TCD5_CITER_ELINKYES)
DMA_TCD5_CITER_ELINKNO
TCD Last Destination Address Adjustment/Scatter Gather
Address (DMA_TCD5_DLASTSGA)
TCD Control and Status (DMA_TCD5_CSR)
TCD Beginning Minor Loop Link, Major Loop Count
(Channel Linking Enabled)
(DMA_TCD5_BITER_ELINKYES)
TCD Beginning Minor Loop Link, Major Loop Count
(Channel Linking Disabled)
(DMA_TCD5_BITER_ELINKNO)
TCD Source Address (DMA_TCD6_SADDR)
TCD Signed Source Address Offset (DMA_TCD6_SOFF)
TCD Transfer Attributes (DMA_TCD6_ATTR)
TCD Minor Byte Count (Minor Loop Disabled)
(DMA_TCD6_NBYTES_MLNO)
TCD Signed Minor Loop Offset (Minor Loop Enabled and
Offset Disabled) (DMA_TCD6_NBYTES_MLOFFNO)
TCD Signed Minor Loop Offset (Minor Loop and Offset
Enabled) (DMA_TCD6_NBYTES_MLOFFYES)
TCD Last Source Address Adjustment
(DMA_TCD6_SLAST)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Register name
DMA memory map (continued)
Table continues on the next page...
(in bits)
Width
16
32
32
32
32
32
16
16
16
32
16
16
16
32
16
16
32
32
32
32
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Freescale Semiconductor, Inc.
Reset value
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Section/
21.3.19/
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21.3.21/
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21.3.24/
21.3.25/
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21.3.30/
21.3.31/
21.3.17/
21.3.18/
21.3.19/
21.3.20/
21.3.21/
21.3.22/
21.3.23/
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