MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 653

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Transpose and complement operations are performed "on the fly" while reading or
writing values. See
30.3.2.2 32-bit CRC
Compute a 32-bit CRC with the following steps:
Transpose and complement operations are performed "on the fly" while reading or
writing values. See
30.3.3 Transpose feature
By default, the transpose feature is not enabled. However, some CRC standards require
the input data and/or the final checksum to be transposed. The user software has the
option to configure each transpose operation separately, as desired by the CRC standard.
The data is transposed "on the fly" while being read or written.
Some protocols use little endian format for the data stream to calculate a CRC. In this
case, the transpose feature usefully flips the bits. This transpose option is one of the types
supported by the CRC module.
Freescale Semiconductor, Inc.
5. Write a 16-bit seed to CRC[LU:LL]. CRC[HU:HL] are not used.
6. Clear the CTRL[WAS] bit to start writing data values.
7. Write data values into CRC[HU:HL:LU:LL]. A CRC is computed on every data
8. When all values have been written, read the final CRC result from CRC[LU:LL].
1. Set the CTRL[TCRC] bit to enable 32-bit CRC mode.
2. Program the transpose and complement options in the CTRL register as required for
3. Write a 32-bit polynomial to GPOLY[HIGH:LOW].
4. Set the CTRL[WAS] bit to program the seed value.
5. Write a 32-bit seed to CRC[HU:HL:LU:LL].
6. Clear the CTRL[WAS] bit to start writing data values.
7. Write data values into CRC[HU:HL:LU:LL]. A CRC is computed on every data
8. When all values have been written, read the final CRC result from
value write, and the intermediate CRC result is stored back into CRC[LU:LL].
the CRC calculation. See
value write, and the intermediate CRC result is stored back into
CRC[HU:HL:LU:LL].
CRC[HU:HL:LU:LL]. The CRC is calculated bytewise, and two clocks are required
to complete one CRC calculation.
Transpose feature
Transpose feature
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Transpose feature
and
and
CRC result complement
CRC result complement
and
CRC result complement
Chapter 30 Cyclic redundancy check (CRC)
for details.
for details.
for details.
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