MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 699

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

stored in flash memory after an initial calibration and recovered prior to the first ADC
conversion. This method should reduce the calibration latency to 20 register store
operations on all subsequent power, reset, or Low Power Stop mode recoveries.
31.4.8 User defined offset function
The ADC offset correction register (OFS) contains the user selected or calibration
generated offset error correction value. This register is a 2’s complement, left justified.
The value in the offset correction register (OFS) is subtracted from the conversion and
the result is transferred into the result registers (Rn). If the result is above the maximum
or below the minimum result value, it is forced to the appropriate limit for the current
mode of operation.
The formatting of the ADC offset correction register is different from the data result
register (Rn) to preserve the resolution of the calibration value regardless of the
conversion mode selected. Lower order bits are ignored in lower resolution modes. For
example, in 8-bit single-ended mode, the bits OFS[14:7] are subtracted from D[7:0]; bit
OFS[15] indicates the sign (negative numbers are effectively added to the result) and bits
OFS[6:0] are ignored. The same bits are used in 9-bit differential mode since bit OFS[15]
indicates the sign bit, which maps to bit D[8]. For 16-bit differential mode, all bits
OFS[15:0] are directly subtracted from the conversion result data D[15:0]. In 16-bit
single-ended mode, there is no bit in the offset correction register corresponding to the
least significant result bit D[0], so odd values (-1 or +1, and so on) cannot be subtracted
from the result.
OFS is automatically set according to calibration requirements once the self calibration
sequence is done (CAL is cleared). The user may write to OFS to override the calibration
result if desired. If the offset correction register is written by the user to a value that is
different from the calibration value, the ADC error specifications may not be met. It is
recommended that the value generated by the calibration function be stored in memory
before overwriting with a user specified value.
The offset calibration function may be employed by the user to remove application
offsets or DC bias values. The offset correction register, OFS may be written with a
number in 2's complement format and this offset will be subtracted from the result (or
hardware averaged value). To add an offset, store the negative offset in 2's complement
Freescale Semiconductor, Inc.
There is an effective limit to the values of offset that can be set
by the user. If the magnitude of the offset is too great, the
results of the conversions will cap off at the limits.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Note
Chapter 31 Analog-to-Digital Converter (ADC)
699