MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1490

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Functional description
49.4.1.2 LCD bias
Because a single frontplane driver is configured to drive more and more individual LCD
segments, 3 voltage levels are required to generate the appropriate waveforms to drive the
segment. The LCD controller is designed to operate using the 1/3 bias mode.
49.4.1.3 LCD controller base clock and frame frequency
The LCD controller is optimized to operate using a 32.768 kHz clock input. Two clock
sources are available to the LCD controller, which are selectable by configuring the
SOURCE bit in the GCR. The two clock sources include:
The following figure shows the LCD clock tree. The clock tree shows the two possible
clock sources and the LCD frame frequency and blink frequency clock source. The LCD
blink frequency is discussed in
1490
• Default clock (SOURCE = 0)
• Alternate clock (SOURCE = 1)
Duty
1/1
1/2
1/3
1/4
1/5
1/6
1/7
1/8
The clock source is chip-specific. For the clock source
assignments, see the chapter that describes how modules are
configured.
DUTY2
Table 49-30. LCD controller duty cycle modes
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0
0
0
0
1
1
1
1
Blink
DUTY1
GCR
0
0
1
1
0
0
1
1
frequency.
NOTE
DUTY0
0
1
0
1
0
1
0
1
Number of backplanes
1
2
3
4
5
6
7
8
Freescale Semiconductor, Inc.
Phase sequence
A B C D E F G H
A B C D E F G
A B C D E F
A B C D E
A B C D
A B C
A B
A