MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 320

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Part Number:
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Memory map/register definition
15.3.9 LLWU Control and Status Register (LLWU_CS)
LLWU_CS is a status and control register that is used to enable/disable the digital filter
for the external pin detect and RESET pin.
320
MWUF4
MWUF3
MWUF2
MWUF1
MWUF0
Field
4
3
2
1
0
ACKISO is set following wakeup from VLLS modes. FLTEP
and FLTR are unaffected following wakeup from low leakage
modes (exit from LLS via RESET or any exit from VLLS).
Wakeup flag for module 4
Indicates that an enabled internal peripheral was a source of exiting LLS or VLLS. To clear the flag follow
the internal peripheral flag clearing mechanism.
0
1
Wakeup flag for module 3
Indicates that an enabled internal peripheral was a source of exiting LLS or VLLS. To clear the flag follow
the internal peripheral flag clearing mechanism.
0
1
Wakeup flag for module 2
Indicates that an enabled internal peripheral was a source of exiting LLS or VLLS. To clear the flag follow
the internal peripheral flag clearing mechanism.
0
1
Wakeup flag for module 1
Indicates that an enabled internal peripheral was a source of exiting LLS or VLLS. To clear the flag follow
the internal peripheral flag clearing mechanism.
0
1
Wakeup flag for module 0
Indicates that an enabled internal peripheral was a source of exiting LLS or VLLS. To clear the flag follow
the internal peripheral flag clearing mechanism.
0
1
Module 4 input was not a source of wakeup from LLS or VLLS mode
Module 4 input was a source of wakeup from LLS or VLLS mode
Module 3 input was not a source of wakeup from LLS or VLLS mode
Module 3 input was a source of wakeup from LLS or VLLS mode
Module 2 input was not a source of wakeup from LLS or VLLS mode
Module 2 input was a source of wakeup from LLS or VLLS mode
Module 1 input was not a source of wakeup from LLS or VLLS mode
Module 1 input was a source of wakeup from LLS or VLLS mode
Module 0 input was not a source of wakeup from LLS or VLLS mode
Module 0 input was a source of wakeup from LLS or VLLS mode
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
LLWU_F3 field descriptions (continued)
NOTE
Description
Freescale Semiconductor, Inc.

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