R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1441

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

28.2.6
STBCR6 is an 8-bit readable/writable register that controls the operation of each module in
power-down modes. Only byte access is valid.
Note: When writing to this register, see section 28.4, Usage Notes.
Bit
7
6
5
4
Standby Control Register 6 (STBCR6)
Bit Name
MSTP67
MSTP66
MSTP65
MSTP64
Initial value:
Initial
Value
1
1
1
1
R/W:
Bit:
MSTP
R/W
67
7
1
R/W
R/W
R/W
R/W
R/W
MSTP
R/W
66
6
1
MSTP
R/W
Description
Module Stop 67
When the MSTP67 bit is set to 1, the supply of the
clock to the SSI0 is halted.
0: SSI0 runs.
1: Clock supply to SSI0 is halted.
Module Stop 66
When the MSTP66 bit is set to 1, the supply of the
clock to the SSI1 is halted.
0: SSI1 runs.
1: Clock supply to SSI1 is halted.
Module Stop 65
When the MSTP65 bit is set to 1, the supply of the
clock to the SSI2 is halted.
0: SSI2 runs.
1: Clock supply to SSI2 is halted.
Module Stop 64
When the MSTP64 bit is set to 1, the supply of the
clock to the SSI3 is halted.
0: SSI3 runs.
1: Clock supply to SSI3 is halted.
65
5
1
MSTP
R/W
64
4
1
R
3
1
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Rev. 3.00 Sep. 28, 2009 Page 1409 of 1650
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2
1
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1
R
1
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Section 28 Power-Down Modes
MSTP
R/W
60
0
1
REJ09B0313-0300