R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 808

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 15 Serial Communication Interface with FIFO (SCIF)
Figure 15.9 shows an example of the operation for reception.
5. When modem control is enabled in channel 3, the RTS signal is output when SCFRDR is
Figure 15.10 shows an example of the operation when modem control is used.
Rev. 3.00 Sep. 28, 2009 Page 776 of 1650
REJ09B0313-0300
Serial
data
RDF
FER
Serial data
empty. When RTS is 0, reception is possible. When RTS is 1, this indicates that SCFRDR
exceeds the number set for the RTS output active trigger.
RxD
RTS
1
Start
bit
Figure 15.10 Example of Operation Using Modem Control (RTS)
0
Start
bit
0
D 0
Figure 15.9 Example of SCIF Receive Operation
D 0
D 1
One frame
D 1
Data
(8-Bit Data, Parity, 1 Stop Bit)
D 2
D 7
RXI interrupt
request
Parity
bit
0/1
D 7
Stop
bit
Parity
bit
1
0/1
Start
bit
1
0
Data read and RDF flag
read as 1 then cleared to 0
by RXI interrupt handler
D 0
D 1
Start
bit
0
Data
D 0
D 7
Parity
bit
D 1
0/1
ERI interrupt request
generated by receive
error
Stop
bit
1
D 7
Idle state
(mark state)
D 1
1