R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 473

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Manufacturer
Quantity
Price
Part Number:
R5S72030W200FP
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SAMSUNG
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Part Number:
R5S72030W200FP
Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
R5S72030W200FP
Manufacturer:
RENESAS
Quantity:
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Figure 10.16 Example of DREQ Input Detection in Burst Mode Level Detection
Figure 10.15 Example of DREQ Input Detection in Burst Mode Edge Detection
CKIO
Bus cycle
DREQ
(Overrun 1 at
high level)
DACK
(Active-high)
CKIO
Bus cycle
DREQ
(Overrun 0 at
high level)
DACK
(Active-high)
CKIO
Bus cycle
DREQ
(Rising)
DACK
(Active-high)
1st acceptance
1st acceptance
Burst acceptance
CPU
CPU
Non sensitive period
CPU
Non sensitive period
CPU
Non sensitive period
CPU
CPU
Section 10 Direct Memory Access Controller (DMAC)
2nd acceptance
DMAC
DMAC
Acceptance
start
Rev. 3.00 Sep. 28, 2009 Page 441 of 1650
DMAC
2nd
acceptance
Acceptance
start
3rd
acceptance
DMAC
DMAC
Acceptance
start
REJ09B0313-0300

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