R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 931

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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(7)
Several more configuration bits in non-compressed mode are shown below. These bits are not
mutually exclusive, but some combinations may not be useful for any other device.
These configuration bits are described below with reference to figure 18.10.
SWL = 6 bits (not attainable in SSI module, demonstration only)
DWL = 4 bits (not attainable in SSI module, demonstration only)
CHNL = 00, SCKP = 0, SWSP = 0, SPDP = 0, SDTA = 0, PDTA = 0, DEL = 0, MUEN = 0
4-bit data samples continuously written to SSITDR are transmitted onto the serial audio bus.
SSISCK
SSIWS
SSIDATA
SCKP = 0, SWSP = 0, DEL = 0, CHNL = 11, SPDP = 0, SDTA = 1
System word length = data word length × 4
SSISCK
SSIWS
SSIDATA
Bit Setting Configuration Format
Figure 18.9 Multi-Channel Format (8 channels; transmitted and received in
Key for this and following diagrams:
TD28
TDn
0
1
(Transmit Mode with Example System/Data Word Length)
MSB
the order of padding bits and serial data; with padding)
word 1
0
Data
Arrow head indicates sampling point of receiver
Bit n in SSITDR
means a low level on the serial bus (padding or mute)
means a high level on the serial bus (padding)
LSB
0
MSB
word 2
TD31 TD30 TD29 TD28
System word 1
Data
Figure 18.10 Basic Sample Format
1st channel
LSB MSB
word 3
Data
LSB MSB
word 4
Data
LSB
0
0
MSB
word 5
Data
TD31 TD30 TD29 TD28
Rev. 3.00 Sep. 28, 2009 Page 899 of 1650
LSB MSB
Section 18 Serial Sound Interface (SSI)
2nd channel
word 6
Data
System word 2
LSB MSB
word 7
Data
LSB MSB
0
REJ09B0313-0300
word 8
Data
0
LSB
TD31

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