R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1488

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 30 List of Registers
Rev. 3.00 Sep. 28, 2009 Page 1456 of 1650
REJ09B0313-0300
Module
Name
SCIF
SSU
Register Name
FIFO data count register_3
Serial port register_3
Line status register_3
Serial extension mode register_3
SS control register H_0
SS control register L_0
SS mode register_0
SS enable register_0
SS status register_0
SS control register 2_0
SS transmit data register 0_0
SS transmit data register 1_0
SS transmit data register 2_0
SS transmit data register 3_0
SS receive data register 0_0
SS receive data register 1_0
SS receive data register 2_0
SS receive data register 3_0
SS control register H_1
SS control register L_1
SS mode register_1
SS enable register_1
SS status register_1
SS control register 2_1
SS transmit data register 0_1
SS transmit data register 1_1
SS transmit data register 2_1
SS transmit data register 3_1
SS receive data register 0_1
SS receive data register 1_1
SS receive data register 2_1
Abbreviation
SCFDR_3
SCSPTR_3
SCLSR_3
SCEMR_3
SSCRH_0
SSCRL_0
SSMR_0
SSER_0
SSSR_0
SSCR2_0
SSTDR0_0
SSTDR1_0
SSTDR2_0
SSTDR3_0
SSRDR0_0
SSRDR1_0
SSRDR2_0
SSRDR3_0
SSCRH_1
SSCRL_1
SSMR_1
SSER_1
SSSR_1
SSCR2_1
SSTDR0_1
SSTDR1_1
SSTDR2_1
SSTDR3_1
SSRDR0_1
SSRDR1_1
SSRDR2_1
Number
of Bits
16
8
8
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Address
H'FFFE981C
H'FFFE9820
H'FFFE9824
H'FFFE9828
H'FFFE7000
H'FFFE7001
H'FFFE7002
H'FFFE7003
H'FFFE7004
H'FFFE7005
H'FFFE7006
H'FFFE7007
H'FFFE7008
H'FFFE7009
H'FFFE700A
H'FFFE700B
H'FFFE700C
H'FFFE700D
H'FFFE7800
H'FFFE7801
H'FFFE7802
H'FFFE7803
H'FFFE7804
H'FFFE7805
H'FFFE7806
H'FFFE7807
H'FFFE7808
H'FFFE7809
H'FFFE780A
H'FFFE780B
H'FFFE780C
Access
Size
16
16
16
16
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16
8
8, 16