R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 289

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5S72030W200FP
Manufacturer:
SAMSUNG
Quantity:
1 001
Part Number:
R5S72030W200FP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
R5S72030W200FP
Manufacturer:
RENESAS
Quantity:
8 000
Note:
• CS1WCR, CS7WCR
Initial value:
Initial value:
Bit
5 to 2
1, 0
Bit
31 to 21
R/W:
R/W:
Bit:
Bit:
* To connect the burst ROM to the CS0 space and switch to burst ROM interface after
Bit Name
HW[1:0]
activation, set the TYPE[2:0] bits in CS0BCR after setting the burst number by the bits
20 and 21 and the burst wait cycle number by the bits16 and 17. Do not write 1 to the
reserved bits other than above bits.
31
15
Bit Name
R
R
0
0
-
-
30
14
R
R
0
0
-
-
29
13
R
R
0
0
-
-
Initial
Value
All 0
00
Initial
Value
All 0
R/W
28
12
R
0
0
-
SW[1:0]
R/W
27
11
R
0
0
-
R/W
R
R/W
R/W
R
R/W
26
10
R
0
1
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Delay Cycles from RD, WEn Negation to Address, CS0
Negation
Specify the number of delay cycles from RD and WEn
negation to address and CS0 negation.
00: 0.5 cycles
01: 1.5 cycles
10: 2.5 cycles
11: 3.5 cycles
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W
25
R
0
9
0
-
WR[3:0]
R/W
24
R
0
8
1
-
R/W
23
R
0
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 257 of 1650
R/W
WM
22
R
0
6
0
-
Section 9 Bus State Controller (BSC)
21
R
R
0
5
0
-
-
R/W
BAS
20
R
0
4
0
-
19
R
R
0
3
0
-
-
REJ09B0313-0300
R/W
18
R
0
2
0
-
WW[2:0]
R/W
R/W
17
0
1
0
HW[1:0]
R/W
R/W
16
0
0
0

Related parts for R5S72030W200FP