R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 954
R5S72030W200FP
Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Specifications of R5S72030W200FP
Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5S72030W200FP
Manufacturer:
SAMSUNG
Quantity:
1 001
Company:
Part Number:
R5S72030W200FP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 19 Controller Area Network (RCAN-TL1)
Mailbox-0 is a receive-only box, and all the other Mailboxes can operate as both receive and
transmit boxes, dependant upon the MBC (Mailbox Configuration) bits in the Message Control.
The following diagram shows the structure of a Mailbox in detail.
Rev. 3.00 Sep. 28, 2009 Page 922 of 1650
REJ09B0313-0300
Mailbox 4 bytes
19
20
21
22
23
24
25
26
27
28
29
30
31
Control0
360 – 363
380 – 383
3A0 – 3A3 3A4 – 3A7 3A8 – 3AF 3B0 – 3B1 No
3C0 – 3C3 3C4 – 3C7 3C8 – 3CF 3D0 – 3D1 No
3E0 – 3E3 3E4 – 3E7 3E8 – 3EF 3F0 – 3F1
400 – 403
420 – 423
440 – 443
460 – 463
480 – 483
4A0 – 4A3 4A4 – 4A7 4A8 – 4AF 4B0 – 4B1 No
4C0 – 4C3 4C4 – 4C7 4C8 – 4CF 4D0 – 4D1
4E0 – 4E3 4E4 – 4E7 4E8 – 4EF 4F0 – 4F1
LAFM
4 bytes
364 – 367
384 – 387
404 – 407
424 – 427
444 – 447
464 – 467
484 – 487
Data
8 bytes
368 – 36F
388 – 38F
408 – 40F
428 – 42F
448 – 44F
468 – 46F
488 – 48F
Control1
2 bytes
370 – 371
390 – 391
410 – 411
430 – 431
450 – 451
470 – 471
490 – 491
Address
Time
Stamp
2 bytes
No
No
No
No
No
No
No
No
4D2 – 4D3
(Local Time)
4F2 – 4F3
(Local Time)
Trigger
Time
2 bytes
No
No
No
No
No
414 – 415
434 – 435
454 – 455
474 – 475
494 – 495
4B4 – 4B5 4B6 – 4B7
4D4 – 4D5 No
No
TT control
2 bytes
No
No
No
No
No
416 – 417
436 – 437
456 – 457
476 – 477
496 – 497
No
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