R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 612

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
• Examples of Output Waveform Control at Synchronous Counter Clearing in Complementary
Rev. 3.00 Sep. 28, 2009 Page 580 of 1650
REJ09B0313-0300
Negative phase
Positive phase
PWM Mode
Figures 11.58 to 11.61 show examples of output waveform control in which the MTU2
operates in complementary PWM mode and synchronous counter clearing is generated while
the WRE bit in TWCR is set to 1. In the examples shown in figures 11.58 to 11.61,
synchronous counter clearing occurs at timing (3), (6), (8), and (11) shown in figure 11.56,
respectively.
Figure 11.58 Example of Synchronous Clearing in Dead Time during Up-Counting
TGRA_3
TGRB_3
H'0000
TCDR
TDDR
(Timing (3) in Figure 11.56; Bit WRE of TWCR in MTU2 is 1)
Synchronous clearing
TCNT_3
(MTU2)
TCNT_4
(MTU2)
Output waveform is active-low.
Bit WRE = 1

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