R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 233

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

7.3.1
BAR is a 32-bit readable/writable register. BAR specifies the address used as a break condition in
each channel. The control bits CD[1:0] and CP[1:0] in the break bus cycle register (BBR) select
one of the four address buses for a break condition.
Note: When setting the instruction fetch cycle as a break condition, clear the LSB in BAR to 0.
Initial value:
Initial value:
Bit
31 to 0
R/W:
R/W:
Bit:
Bit:
Break Address Register (BAR)
Bit Name
BA31 to BA0 All 0
BA31
BA15
R/W
R/W
31
15
0
0
BA30
BA14
R/W
R/W
30
14
0
0
BA29
BA13
R/W
R/W
29
13
0
0
Initial
Value
BA28
BA12
R/W
R/W
28
12
0
0
BA27
BA11
R/W
R/W
27
11
0
0
R/W
R/W
BA26
BA10
R/W
R/W
26
10
0
0
Description
Store an address on the CPU address bus (FAB or
MAB) or internal address bus (ICAB or IDAB)
specifying break conditions.
When the C bus and instruction fetch cycle are
selected by BBR, specify an FAB address in bits BA31
to BA0.
When the C bus and data access cycle are selected by
BBR, specify an MAB address in bits BA31 to BA0.
When the internal CPU bus (I bus) is selected by BBR,
specify an ICAB address in bits BA31 to BA0.
When the internal DMA bus (I bus) is selected by BBR,
specify an IDAB address in bits BA31 to BA0.
Break Address
BA25
R/W
R/W
BA9
25
0
9
0
BA24
R/W
R/W
BA8
24
0
8
0
BA23
R/W
R/W
BA7
23
0
7
0
Rev. 3.00 Sep. 28, 2009 Page 201 of 1650
BA22
R/W
R/W
BA6
22
0
6
0
Section 7 User Break Controller (UBC)
BA21
R/W
R/W
BA5
21
0
5
0
BA20
R/W
R/W
BA4
20
0
4
0
BA19
R/W
R/W
BA3
19
0
3
0
REJ09B0313-0300
BA18
R/W
R/W
BA2
18
0
2
0
BA17
R/W
R/W
BA1
17
0
1
0
BA16
R/W
R/W
BA0
16
0
0
0