R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 948

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 19 Controller Area Network (RCAN-TL1)
Rev. 3.00 Sep. 28, 2009 Page 916 of 1650
REJ09B0313-0300
16-bit peripheral bus
[Legend]
n = 0, 1
Note: The core of the RCAN-TL1 is designed with a 32-bit bus system as the basis, but the RCAN-TL1 overall uses a 16-bit bus
interface for communication with the CPU, including the MPI. Longword (32-bit) accesses are converted into two consecutive
word accesses by the bus interface.
CAN Interface
TTCR0
RFTROFF
CYCTR
TCMR0
TCMR2
MCR
GSR
CCR
BCR
Micro Processor
16-bit Timer
Interface
CMAX_TEW
TTTSEL
TCMR1
TCNTR
RFMK
IRR
IMR
TSR
Figure 19.1 RCAN-TL1 architecture
REC
Transmit Buffer
CRxn
Can Core
Receive Buffer
CTxn
Mailbox0
Mailbox1
Mailbox2
Mailbox3
Mailbox4
Mailbox5
Mailbox6
Mailbox7
Mailbox0
Mailbox1
Mailbox2
Mailbox3
Mailbox4
Mailbox5
Mailbox6
Mailbox7
Mailbox 0 to 31 (register)
MBIMR
TXPR
TXCR
RXPR
Mailbox 0 to 31 (RAM)
TEC
Control
Signals
Mailbox10
Mailbox11
Mailbox12
Mailbox13
Mailbox14
Mailbox15
Mailbox10
Mailbox11
Mailbox12
Mailbox13
Mailbox14
Mailbox15
Mailbox Control
Mailbox8
Mailbox9
Mailbox8
Mailbox9
Mailbox16
Mailbox17
Mailbox18
Mailbox19
Mailbox20
Mailbox21
Mailbox22
Mailbox23
Mailbox16
Mailbox17
Mailbox18
Mailbox19
Mailbox20
Mailbox21
Mailbox22
Mailbox23
TXACK
ABACK
UMSR
RFPR
Signals
Status
Mailbox24
Mailbox25
Mailbox26
Mailbox27
Mailbox28
Mailbox29
Mailbox30
Mailbox31
Mailbox24
Mailbox25
Mailbox26
Mailbox27
Mailbox28
Mailbox29
Mailbox30
Mailbox31
control0
LAFM
DATA
control1
Timestamp
Tx-Trigger Time
TT control