mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1039

no-image

mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
NBPL0—Number of Bursts per Line 0
This field defines the number of bursts per line.
19.3.6 Video Frame Buffer A Start Address Register (Set 0)
Th 32-bit video frame buffer A start address register set 0 (VFAA0) holds the start address
of the set_0 odd field. Since all bursts must be 16-byte aligned, this register does not use
the four least-significant bits of the address.
FAA0—Frame Buffer A Start Address for Set 0
This field designates the start address of the frame buffer A set 0 in system memory.
VFAA0
NOTE: X = “Don’t Care” and — = Undefined.
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
16
0
Note: The value of the NBPL0 field must be non-zero or an error will occur.
17
1
18
2
Freescale Semiconductor, Inc.
For More Information On This Product,
19
3
20
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
21
5
FAA0
R/W
(IMMR & 0xFFFF0000) + 0x814
(IMMR & 0xFFFF0000) + 0x816
22
6
23
7
FAA0
R/W
24
8
25
9
10
26
11
27
12
28
Video Controller
13
29
R/W
X
14
30
19-11
15
31

Related parts for mpc823rg