mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 655

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

16.9.15.5 PROGRAMMING THE SCCx IN UART MODE. The SCCx UART controller
uses the same data structure as the other modes and supports multibuffer or multidrop
operation. You can program the SCCx UART controller to reject messages that are not
destined for a programmable address (multidrop mode). You can also program the SCCx
UART controller to accept or reject control characters. If a control character is rejected, an
interrupt can be generated. The receive character can be accepted using a receive
character mask value.
The SCCx UART controller enables you to transmit break and preamble sequences.
Overrun, parity, noise, and framing errors are reported via the buffer descriptor table and/or
error counters. An indication of the signal line status is reported in the status register and a
maskable interrupt is generated when the status changes. In its simplest form, the SCCx
UART controller functions in a character-oriented environment, in which each character is
transmitted with the stop bits and parity and received into separate 1-byte buffers. A
maskable interrupt is generated when a buffer is received.
Using linked buffers, many applications try to take advantage of the message-oriented
capabilities that the serial communication controllers support in UART mode. Data is
handled in a message-oriented environment, which means that you can work on entire
messages rather than operating on a character-by-character basis. Also, a message can
span several linked buffers. For example, before handling the input data, a terminal driver
may want to wait until you type an end-of-line character rather than be interrupted when a
character is received.
As another example, when transmitting ASCII files, the data can be transferred as
messages ending on the end-of-line character. Each message could be both transmitted
and received as a linked list of buffers without any intervention from the core, which makes
it easy to program and saves processor overhead. Before reception, you can define up to
eight control characters and each control character can be configured to designate the end
of a message or generate a maskable interrupt without being stored in the data buffer. The
latter option is useful when flow control characters such as XON or XOFF need to alert the
core but do not belong to the received message.
• RCCRP—This value is used to hold the value of any control character that is not written
• RLBC—This entry is used in synchronous UART when the RZS bit is set in the
to the data buffer.
PSMR–UART and contains the actual pattern of the last break character. By counting
the zeros in this entry, the core can measure the break length to a bit resolution. You
read RLBC by counting the number of zeros written, starting at bit 15 continuing to the
point where the first one was written. Therefore, RLBC = 001xxxxxxxxxxxxx (binary)
indicates two zeros and RLBC = 1xxxxxxxxxxxxxxx (binary) indicates no zeros.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
Communication Processor Module
16-203