mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 852

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
16.11.6.12 SMCx UART TRANSMIT BUFFER DESCRIPTOR. Data is sent to the
communication processor module for transmission on an SMCx channel by arranging it in
buffers referenced by the channel’s transmit (TX) buffer descriptor ring. Using the buffer
descriptors, the communication processor module confirms transmission or indicates error
conditions so that the processor knows the buffers have been serviced.
R—Ready
Bits 1, 4–5, and 8–15—Reserved
These bits are reserved and must be set to 0.
W—Wrap (Final Buffer Descriptor in Table)
I—Interrupt
OFFSET + 0
OFFSET + 2
OFFSET + 4
OFFSET + 6
NOTE: You are only responsible for initializing the items in bold.
0 = The data buffer associated with this buffer descriptor is not ready for transmission,
1 = The data buffer, which you prepare for transmission, is not transmitted yet or is
0 = This is not the last buffer descriptor in the TX buffer descriptor table.
1 = This is the last buffer descriptor in the TX buffer descriptor table. After this buffer is
0 = No interrupt is generated after this buffer is serviced.
1 = The TX bit in the SMCE–UART register is set when this buffer is serviced.
but you are free to manipulate this buffer descriptor or its associated data buffer.
The communication processor module clears this bit after the buffer has been
transmitted or an error condition is encountered.
currently being transmitted. You cannot write any fields of this buffer descriptor
once this bit is set.
used, the communication processor module receives incoming data into the first
buffer descriptor that TBASE points to in the table. The number of TX buffer
descriptors in this table is programmable and determined only by the W bit and
overall space constraints of the dual-port RAM.
Transmission can cause an interrupt if it is enabled.
R
0
Note: The communication processor module sets all the status bits in this buffer
RES
1
W
descriptor, but you must clear them before submitting the buffer descriptor to the
communication processor module.
2
Freescale Semiconductor, Inc.
For More Information On This Product,
3
I
RESERVED
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
5
TX DATA BUFFER POINTER
CM
6
DATA LENGTH
P
7
8
9
10
RESERVED
11
12
13
MOTOROLA
14
15

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