mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 194

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Instruction Cache
CCER1—Instruction Cache Error Type 1
This field is sticky and set by the hardware. It is read-only and cleared when read.
CCER2—Instruction Cache Error Type 2
This field is sticky and set by the hardware. It is read-only and cleared when read.
CCER3—Instruction Cache Error Type 3
This field is sticky and set by the hardware. It is read-only and cleared when read.
Bits 13–31—Reserved
These bits are reserved and must be set to 0.
9.2.2 Instruction Cache Address Register
The instruction cache register (IC_ADR) contains addresses to be used in the command
programmed in the IC_CST.
ADR—Address
This field represents the address to be used in the command programmed in the CMD field
of the IC_CST. The format may vary depending on the selected cache operation.
IC_ADR
NOTE: — = Undefined.
RESET
RESET
FIELD
FIELD
SPR
SPR
R/W
R/W
BIT
BIT
0 = No Error.
1 = Error.
0 = No Error.
1 = Error.
0 = No Error.
1 = Error.
16
0
17
1
18
2
Freescale Semiconductor, Inc.
For More Information On This Product,
19
3
20
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
21
5
22
6
23
7
ADR
ADR
R/W
R/W
561
561
24
8
25
9
10
26
11
27
12
28
13
29
MOTOROLA
14
30
15
31

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