mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 492

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
16.3.4.1.2 FIR1 Function Descriptor. The FIR1 function descriptor bit table is described
below.
The first half-word is composed of the following bits:
S—STOP
Bits 1, 4, and 9–10—Reserved
These bits are reserved and must be set to 0.
W—Wrap (Final Function Descriptor in Table)
I—Interrupt
IALL— Auto-Increment X For All Iterations
OFFSET + A
OFFSET + C
OFFSET + E
OFFSET + 0
OFFSET + 2
OFFSET + 4
OFFSET + 6
OFFSET + 8
0 = Do not stop after executing this function descriptor.
1 = Stop after executing this function descriptor.
0 = This is not the last function descriptor in the function descriptor table.
1 = This is the last function descriptor in the function descriptor table. After this buffer
0 = No interrupt is generated after this function is processed.
1 = A maskable interrupt is generated after this function is processed.
0 = The X (input) data pointer is incremented (Modulo M+1) by the number of samples
1 = The X data pointer is incremented (Modulo M+1) by the number of samples
has been used, the CPM processes the first function descriptor that the FDBASE
index pointer points to in the table. The number of function descriptors in this table
are programmable and determined only by the W bit and overall space constraints
of the memory.
specified in the INDEX field after the last iteration.
specified in the INDEX field after each iteration.
0
S
RES
1
W
2
Freescale Semiconductor, Inc.
For More Information On This Product,
3
I
RES IALL
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
5
6
INDEX
RESERVED
7
CBASE
XYPTR
M
K
N
I
PC
8
9
RES
10
11
12
OPCODE
13
MOTOROLA
14
15

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