mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1200

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
dcbz
Assembler Syntax
Definition
Operation
Description
FIELD
FIELD
BIT
BIT
16
0
17
1
18
B
2
Freescale Semiconductor, Inc.
31
For More Information On This Product,
19
3
dcbz
Data Cache Block Set to Zero
EA is the sum ( r A|0) + ( r B).
The dcbz instruction executes as follows:
20
MPC823 REFERENCE MANUAL
4
If the cache block containing the byte addressed by EA is
in the data cache, all bytes are cleared.
If the cache block containing the byte addressed by EA is
not in the data cache and the corresponding page is
caching-allowed, the cache block is allocated in the data
cache (without fetching the block from main memory),
and all bytes are cleared.
If the page containing the byte addressed by EA is in
caching-inhibited or write-through mode, either all bytes
of main memory that correspond to the addressed cache
block are cleared or the alignment exception handler is
invoked. The exception handler clears all bytes in main
memory that corresponds to the addressed cache block.
If the cache block containing the byte addressed by EA is
in coherency-required mode, and the cache block exists
in the data cache(s) of any other processor(s), it is kept
coherent in those caches.
Go to: www.freescale.com
21
5
rA,rB
22
6
23
7
00000
24
8
25
9
1014
10
26
MPC823 Instruction Set—dcbz
11
27
12
28
13
29
A
14
30
B-47
15
31
0

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