mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 815

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
EN—Enable USB
This bit enables USB operation. When the EN bit is cleared, the USB is in a reset state and
consumes minimal power.
16.10.8.2 USB RECEIVE BUFFER DESCRIPTOR. The USB controller reports
information about each buffer of received data using (RX) buffer descriptors. The USB
controller closes the current buffer, generates a maskable interrupt, and starts receiving
data in the next buffer when the current buffer is full. Additionally, it will close the buffer under
the following conditions:
The first word of the RX buffer descriptor contains status and control bits. It is recommended
that you prepare these bits before reception because they are set by the USB controller after
the buffer has been closed. The second word contains the data length (in bytes) that was
received. The third and fourth words contain a pointer that always points to the beginning of
the received data buffer.
OFFSET + 0
OFFSET + 2
OFFSET + 4
OFFSET + 6
NOTE: You are only responsible for initializing the items in bold.
• When an end of packet is detected
• When an overrun error occurs
• When a bit stuff violation is detected
BIT
0 = USB is disabled.
1 = USB is enabled.
0
E
Note: You must not modify any other bits of the USMOD register while the EN bit is set.
Note: The buffer descriptor’s status bits are sticky. Applications that operate on those
RES
1
bits may need to be reset after every relevant CPM transaction.
W
2
Freescale Semiconductor, Inc.
For More Information On This Product,
3
I
MPC823 REFERENCE MANUAL
4
L
Go to: www.freescale.com
F
5
RX DATA BUFFER POINTER
6
RES
DATA LENGTH
7
8
PID
9
Communication Processor Module
RES
10
NO
11
AB
12
CR
13
OV
14
16-363
RES
15

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