mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 212

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

When reading from the DC_DAT register, the 23 bits of the tag (and related information) that
is selected by the DC_ADR are placed in the targeted general-purpose register. The
following table illustrates the DC_DAT register’s bit layout when reading a tag. Writing to
DC_DAT is illegal and can result in an undefined data cache state.
TAG—Tag Selection
This field contains the upper 23 bits of the address.
Bits 27–31—Reserved
These bits are reserved and must be set to 0.
L—Lock Entry
LRU—Least Recently Used
D—Dirty or Clean Cache Line
V—Valid Cache Line
DC_DAT (TAG READ FORMAT)
NOTE: — = Undefined.
RESET
RESET
FIELD
FIELD
SPR
SPR
R/W
R/W
BIT
BIT
0 = Cache entry is unlocked.
1 = Cache entry is locked.
0 = This entry is not aged or least-recently used.
1 = This entry is aged or least-recently used.
0 = This entry has not been modified since it was read from memory.
1 = This entry has been modified since it was read from memory.
0 = Entry is not valid.
1 = Entry is valid.
16
0
17
1
18
2
Freescale Semiconductor, Inc.
TAG
R/W
For More Information On This Product,
19
—
3
20
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
21
5
22
6
R/W
23
—
7
L
TAG
R/W
570
570
—
LRU
R/W
24
—
8
R/W
25
—
D
9
R/W
10
26
—
V
11
27
12
28
RESERVED
R/W
13
29
—
Data Cache
14
30
10-9
15
31